In the past, there have been CPU emulators, each of which causes an own central processing unit (CPU) to execute the operation of an other CPU whose architecture is different from the architecture of the own CPU. With respect to software difficult to execute in the architecture of the own CPU, the CPU emulator causes the own CPU to execute the operation of a CPU in the architecture of which the software is operable, and hence the CPU emulator causes the software to be executed in the own CPU.
In addition, a technique has been known in which a first software module emulating instruction codes is implemented in a main processor and one of processor cores other than the main processor prefetches an instruction code to be executed by the main processor to a shared cache memory in advance of the execution of the main processor. In addition to this, for example, a technique has also been known in which an instruction emulation processing operation is divided in response to the number of processors, the individual divided processing operations are assigned to processors, respectively, and individual processors execute in parallel the assigned processing operations. Examples of such techniques are disclosed in Japanese Laid-open Patent Publication No. 2004-127154 and Japanese Laid-open Patent Publication No. 2006-268487.